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Key points of seven common interface types in circuit design

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  We know that there may be some problems in the data exchange of each sub-module of the circuit system, so that the signal can not be normal, high-quality "flow", for example, sometimes the operation timing of the circuit sub-modules has errors (such as CPU and peripherals). The respective signal types are inconsistent (such as the sensor detects the optical signal), etc., then we should consider the corresponding interface to deal with this problem well. Take the answer from DPC Ceramics Xiaobian!

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  The following is a description of the key points of the seven commonly used interface types in circuit planning:

  TTL level interface

  This type of interface is basically a cliché. From the beginning of college to study analog circuits and digital circuits, the general circuit planning, TTL level interface simply can not be "connected"! Its speed is generally limited to 30MHz, which is due to There are several pF input capacitors at the input of the BJT (constituting an LPF). If the input signal exceeds a certain frequency, the signal will be “lost”. Its driving ability is generally up to tens of milliamps. The signal voltage for normal operation is generally high, and if it is close to the ECL circuit with a lower signal voltage, a more significant crosstalk problem will occur.

  CMOS level interface

  We are no stranger to it, and we often deal with it. Some semiconductor features about CMOS don't have to be cumbersome here. What many people know is that CMOS power consumption and anti-interference are better than TTL under normal conditions. However, it is little known that at high conversion frequencies, the CMOS series actually consumes more power than TTL. As for why, please ask about semiconductor physics theory. Since the operating voltage of CMOS can now be very small, some FPGA core operating voltages are even close to 1.5V, which makes the noise margin between levels much smaller than TTL, which is more serious due to voltage fluctuation. The signal is judged to be faulty. It is well known that the input impedance of a CMOS circuit is very high, and therefore, its coupling capacitance can be small, and it is not required to use a large electrolytic capacitor. Since CMOS circuits usually have weak driving capabilities, it is necessary to perform TTL conversion before driving the ECL circuit. In addition, when planning the CMOS interface circuit, care should be taken to prevent the capacitive load from being overweight, otherwise the rise time will be slower and the power consumption of the drive equipment will increase (because the capacitive load does not consume power).

  ECL level interface

  This is an old friend inside the computer system! Because its speed "runs" fast enough, it can even run hundreds of MHz! This is because the BJT inside the ECL is not saturated when it is turned on, so it can be cut. At the turn-on and turn-off of BJT, the speed of work can naturally be raised. But, this is a price to pay! Its fatal injury: power consumption is large! The EMI problem caused by it is worth considering, and it is better to resist the disturbance. If anyone can compromise these two points If you have the elements, then he or she should make a fortune. It should also be noted that the general ECL integrated circuit requires a negative power supply, that is, its output voltage is negative, and a special level shift circuit is required.

  RS-232 level interface

  No one who knows how to play electronic technology knows it (unless he or she is only a "outsider" of electronic technology). It is a low-speed serial communication interface standard. It should be noted that its level standard is a bit "abnormal": high level is -12V, and low level is +12V. So, when we try to communicate with the peripherals through the computer, a level conversion chip MAX232 is naturally indispensable. However, we must be aware of some of its shortcomings, such as slow data transmission speed and short transmission interval.

  Differential balanced level interface

  It uses a pair of terminals A and B relative output voltage (uA-uB) to represent the signal. In general, this differential signal will pass through a complex noise environment during signal transmission, causing both lines to occur. Fundamentally the same amount of noise, and the energy of the noise will be offset at the receiving end, so it can complete the transmission at a longer interval and at a higher rate. The commonly used RS-485 interface in the industry is the differential transmission mode, which has good resistance to common mode interference.

  Light blocking interface

  Photoelectric coupling uses the optical signal as a preface to complete the coupling and transmission of electrical signals. Its "benefit" is to be able to complete the electrical barrier, so it has excellent anti-interference ability. Under the condition that the circuit operation frequency is very high, only the high-speed optical resistance interface circuit can satisfy the data transmission requirement. Sometimes in order to complete the control of high voltage and high current, it is necessary to plan and use the light blocking interface circuit to connect these low-level, low-current TTL or CMOS circuits as described above, due to the input loop and output loop of the light blocking interface. The ability to withstand high voltages of several thousand volts is sufficient for general applications. In addition, the input part and the output part of the light blocking interface need to be separated from the independent power supply, otherwise there is still electrical contact, which is not called blocking.

  Coil coupling interface

  DPC ceramics Xiaobian introduced that its electrical barrier characteristics are good, but the signal bandwidth of the promise is limited. For example, transformer coupling, its power transmission efficiency is very high, the output power is close to its input power, therefore, for a step-up transformer, it can have a higher output voltage, but can only give a lower Current. In addition, the high-frequency and low-frequency characteristics of the transformer are not optimistic, but its greatest feature is the ability to perform impedance transformation. When matched, the load can obtain enough power. Therefore, the transformer coupling interface is planned in the power amplifier circuit. It is very "fragrant".
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